#84684 - Ant6n - Wed May 24, 2006 4:33 am
Hey,
in the specs it says, regarding the speed of dma transfers:
"Transfer Rate/Timing
Except for the first data unit, all units are transferred by sequential reads and writes. For n data units, the DMA transfer time is:
2N+2(n-1)S+xI
Of which, 1N+(n-1)S are read cycles, and the other 1N+(n-1)S are write cycles, actual number of cycles depends on the waitstates and bus-width of the source and destination areas (as described in CPU Instruction Cycle Times chapter). Internal time for DMA processing is 2I (normally), or 4I (if both source and destination are in gamepak memory area)."
does anybody know what exactly N,n,S,x and I refers to?
why should I use dma as oppossed to load and store words assembler directives (unrolled loop); which is faster?
thx
anton
in the specs it says, regarding the speed of dma transfers:
"Transfer Rate/Timing
Except for the first data unit, all units are transferred by sequential reads and writes. For n data units, the DMA transfer time is:
2N+2(n-1)S+xI
Of which, 1N+(n-1)S are read cycles, and the other 1N+(n-1)S are write cycles, actual number of cycles depends on the waitstates and bus-width of the source and destination areas (as described in CPU Instruction Cycle Times chapter). Internal time for DMA processing is 2I (normally), or 4I (if both source and destination are in gamepak memory area)."
does anybody know what exactly N,n,S,x and I refers to?
why should I use dma as oppossed to load and store words assembler directives (unrolled loop); which is faster?
thx
anton