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DS development > Bus speed and sound speed?

#155151 - Dwedit - Fri Apr 25, 2008 7:02 pm

Gbatek says that the bus speed is 33513982Hz. (instead of expected 33554432Hz)
It then says sound is 32768 Hz.
By 32768, does it really mean bus speed/1024 (32728.498..) or does it really mean 32768?
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#155152 - Noda - Fri Apr 25, 2008 7:07 pm

AFAIK, bus speed and sound timing are completely unrelated. The 32768Hz is the frequency of the DAC, which has its own clock.

#155155 - Dwedit - Fri Apr 25, 2008 7:15 pm

So you can either have a sound channel output at 32792.5459883 Hz, or 32728.498046875Hz, but not 32768Hz?
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#155156 - Maxxie - Fri Apr 25, 2008 7:28 pm

Noda wrote:
AFAIK, bus speed and sound timing are completely unrelated. The 32768Hz is the frequency of the DAC, which has its own clock.


Given the over/underclocker videos (i.e. http://www.youtube.com/watch?v=PYIvASbELkw ), this isn't true:
When changing the main clock, the sound frequency changes too (It sounds higher on 100MHz and deeper on 25MHz)

(Unless i can't trust my ears)

That would mean that the sound clock correlates to the system clock.

#155159 - Dwedit - Fri Apr 25, 2008 7:43 pm

That video shows that sound channels are sending data to the PWM thingy at bus speed, but says nothing about what the PWM's native sampling rate outputs at.
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#155163 - josath - Fri Apr 25, 2008 8:32 pm

I think the DS's sound output isn't good enough that anybody will notice the difference between 32768Hz and 32728 Hz :P

#155166 - tepples - Fri Apr 25, 2008 9:00 pm

I think josath is right. In most human subjects, just noticeable difference in pitch is about six cents. (A cent is 1/1200 of an octave, or a ratio of 2^(1/1200) = about 1.00057779.) The difference between 32728 and 32768 is 2.1 cents.
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#155174 - Maxxie - Sat Apr 26, 2008 12:03 am

Dwedit wrote:
That video shows that sound channels are sending data to the PWM thingy at bus speed, but says nothing about what the PWM's native sampling rate outputs at.


No it doesn't. Even in 25MHz (12.5MHz bus speed) therer is enought bandwidth left t not be dependend on the bus speed on feeding the sound.

So if the sound hardware would request the data (for what 48kHz? and multiple channels) there would be plenty of time for the data to come in and be played in time so the hardware would be still be plaing in normal frequency. (It would rather repeat parts as the mem buffer isn't refilled in time by a CPU Clock triggered routine or starts to skip around on to high speeds, which i both didn't hear)


Apposing to the case when the sound hardware clock is dependend on the system clock and would therefor request the data in a lower speed thus reducing the frequency of the output. Esp. with all the hardware on one chip which is fed with one crystal. (Even the RTC)

The only independend clock i know on the nds is the 22MHz crystal for the RF chips.

#155198 - simonjhall - Sat Apr 26, 2008 11:19 am

The sound sampling rate is a multiple of the bus speed, and when you set up the sound hardware you're setting it up in the exact same way as you would do a timer, which is also driven by the same bus. If the sound sampling rate was slightly faster/slower than the bus speed, how many samples should it fetch per bus clock?

Also saying a human won't be able to hear the difference isn't really the problem - due to the lack of an interrupt telling you when your buffer's finished playing you need to make a very eduated guess as to when to refill it without clicking. And to do this (by counting bus cycles), the TIMER(x) timers and the sound hardware need to be synchronised. If they were driven by different clocks then using a scheme like this for buffer refilling would quickly drift...

Or have I completely missed the point here? :-D
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#155225 - Dwedit - Sat Apr 26, 2008 8:52 pm

I think I was a little unclear about my original question.
I know that the sound rate as produced by the sound dma timer thingy is a period in units of (bus speed/2), but I was wondering about the PWM part that consumes that sound at 32768Hz.
I clearly see that it doesn't matter.
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#155227 - Maxxie - Sat Apr 26, 2008 9:25 pm

Well the channels feeder and the PWM have a nice 320:1 timing. I have doubts that someone (n) would add another expensive clock, when a few gates would do the trick.

Since this has nearly no effect for the output (except that you could feed higher frequencies that would get eaten on the way out) and no internal feedback on that timer, i guess the only method to get the exact info by measuring the shortest length of the descret levels on an Oscilator.

#155257 - tepples - Sun Apr 27, 2008 3:04 pm

What p***es me off about the GBA/DS PWM DAC is that they use PWM and not pulse density modulation.
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-- Where is he?
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#155265 - silent_code - Sun Apr 27, 2008 3:50 pm

@ tepples: i was wondering, if PDM is equivalent to how 1bit recorders work? it looks a lot like it.

have a nice weekend, folks!