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Hardware > Homemade Flashcart project snags...need a little help

#177871 - arcaios26 - Mon Apr 15, 2013 12:59 am

I've been reading all the information I can find. I'm trying to build a flash cart with an rtc ic built in. I'm trying to get a better understanding of where to attach the rtc chip's connections in the cart but I don't fully understand how it functions in official carts and was hoping someone might can help me out.

#177878 - WriteASM - Tue Apr 16, 2013 11:27 pm

(been waiting to see if anyone else will reply :-))
If you're trying to make an official cartridge clone, how about tracing the circuit on an official cartridge? In the case that you don't have an official cartridge, I could trace the schematic on the Pokemon Ruby cartridge I have.

I'm curious: If you're building your own FLASH cartridge, what are you using for the address latches on AD0-15?
_________________
"Finally, brethren, whatever is true, whatever is honorable, whatever is right, whatever is pure, whatever is lovely, whatever is of good repute, if there is any excellence and if anything worthy of praise, dwell on these things." (Philippians 4:8)

#177881 - arcaios26 - Fri Apr 19, 2013 7:25 am

hi, and thanks for the reply. I would love it if you could as I do not have access to a cart with the rtc currently. I'm gonna be handling the latches in a CPLD along with the demultiplexing of those addresses since they are both input and output on the cart bus to my understanding.

#177882 - WriteASM - Fri Apr 19, 2013 1:18 pm

I'm sure you know this already, but CPLD needs to be a 3.3v parallel-load 16-bit up counter. There shouldn't be any need for demultiplexing, unless I'm misunderstanding something. I'll assume you found this schematic.
Also, the total sequential access time (CPLD + FLASH chip) should be less than 120uS. If you're interested, I have some photos of an oscilloscope connected to various cartridge leads, and the timings are very obvious.

Just a suggestion...if you use a 29xxxx (or 39xxxx)-series FLASH chip, the GBA will be able to program it, with no external "programmer" required. (A 28xxxx requires a high VPP, typically +12v.)

OK, I'll get out the multimeter and probe around. I'm not exactly sure what to make of the cartridge I have (RTC part# is S3511), as each of the RTC's leads go through multiple resistors (and resistor bridges) before reaching the cartridge pins. For what it's worth, Timmy Brolin's RTC demo doesn't recognize it.


BTW, I've got everything to make my FLASH cartridges...except a programmer for the CPLD, and those aren't cheap. Unfortunately, I haven't had much success finding the IEEE 1149.1 or 1532 specifications for less than the cost of a programmer. Maybe you can help me out, too :-) (My CPLD: Lattice LC4032-75TN48C)
_________________
"Finally, brethren, whatever is true, whatever is honorable, whatever is right, whatever is pure, whatever is lovely, whatever is of good repute, if there is any excellence and if anything worthy of praise, dwell on these things." (Philippians 4:8)

#177884 - arcaios26 - Fri Apr 19, 2013 1:53 pm

thank you very much, and I had a pretty good idea of how to do the CPLD from older schematic designs I found. I'll look into the flash chip soon. I haven't made a final decision on the specific parts yet lol. If I can use the CPLD I already have it has a JTAG programming interface that is rather simple to incorporate into the cart pcb (still requiring a seperate connection to program from cart bus of course)

#177885 - WriteASM - Fri Apr 19, 2013 2:33 pm

I made a schematic of the RTC hookup on the cartridge I have...let's say that it was a miserable disappointment! All of the RTC's leads go to the mask ROM chip! Sorry.
EDIT: The RTC leads connect to pins on the ROM that are usually tied to a power supply rail: pins 1(/SCK), 2(SIO), 21(CS), 43(/IRQ). ROM pin 44 goes to the /IRQ pin of the cartridge.

The Lattice CPLD I chose costs $1.79 each from Mouser Electronics, and should be fast enough. And yes, it supports JTAG. (Just where do you find a reasonably-priced JTAG programmer?)
My actual idea is to make a JTAG programmer with the GBA itself. The link port has a four-bit I/O mode...perfect for TDI, TDO, TMS, TCK. Unfortunately, I haven't found quite enough documentation to make it actually work. IEEE 1149.1 is obsolete anyway--why IEEE doesn't make it publicly available, I don't know.
_________________
"Finally, brethren, whatever is true, whatever is honorable, whatever is right, whatever is pure, whatever is lovely, whatever is of good repute, if there is any excellence and if anything worthy of praise, dwell on these things." (Philippians 4:8)

#177886 - arcaios26 - Fri Apr 19, 2013 6:45 pm

I was afraid of that. From what I've been reading it seems as though it uses a general purpose I/O port built into the Rom...guess I'll be building circuitry for that too. I have the basics of how that GPIO port works.....

#177901 - arcaios26 - Mon Apr 22, 2013 9:56 pm

Been. Working on my cpld code just trying to figure out how to implement the gpio port and if the counter needs to count up one or two spots for sequential address reads

#177902 - WriteASM - Tue Apr 23, 2013 12:28 pm

The counter needs to increment by one for "sequential" access (reads/writes). With a 16-bit FLASH chip, an increment by "one" means a whole new 16-bit word. Counting by 2s will certainly work...although your memory chip will seem much smaller than expected.

Some 16-bit FLASH chips have a pin (/BYTE) for selecting 8- or 16-bit I/O (I.E. AM29F200AB-90SC, although it's 5v), and DQ15 becomes "A -1" in 8-bit mode. For the 16-bit bus access, you would still connect the LSB of the counter to A0. (Perhaps a chip with a switchable I/O bus size might implementing 8-bit "savegame FLASH" much easier?)
_________________
"Finally, brethren, whatever is true, whatever is honorable, whatever is right, whatever is pure, whatever is lovely, whatever is of good repute, if there is any excellence and if anything worthy of praise, dwell on these things." (Philippians 4:8)

#177909 - arcaios26 - Tue Apr 23, 2013 6:31 pm

well the part thats really kicking me is the GPIO to interface the RTC is controlled by adress 80000C4, 80000C6 and 80000C8....C8 uses just the first bit to enable write only or read/write (basically it enable the port. bits 1-3 of C6 determine In or Out for the 3 bits used on the port and C4 is the port with bit 1 being the Serial clock pin, bit 2 is the Serial I/O pin and bit 3 is the Chip Enable pin...

also the IRQ pin of the RTC chip can connect directly to the cart bus IRQ just through an inverter which is all its doing on the Nintendo Rom chip

figuring out a good way to handle those addresses instead of passing it to the flash chip is what I'm currently working on.

Further I'm also working on figuring out how the counter will actually pass each address to the chip, from what it looks like each time it counts up the CPLD will have to pass the new address to the chip by making CE high and then pull it Low again (not sure if I'm right or now, still reading the data sheet for the flash chip to be sure)

#177915 - WriteASM - Wed Apr 24, 2013 12:27 pm

Admittedly, I didn't know anything about a GPIO port in a MaskROM until this post. But I do know a fair bit about using FLASH and page-write parallel EEPROM chips.

Passing the GPIO addresses to a FLASH chip is not a problem. If /CE (/CS) or /OE (/RD) are high, the bus will be free. (Conversely, if both are LOW, the bus will NOT be free.) Regarding writing to those addresses (as you've probably read already), the FLASH chip requires a three-byte sequence. If the sequence is invalid (as with writes to the GPIO port), the FLASH chip will ignore the writes.

As far as I know, /CE doesn't have to be toggled for a new address. If the address is changed, the output data will change (and the access time will be faster: you don't have the /CE delay!) I've breadboarded circuits that worked just fine with /OE and /CE held low.
_________________
"Finally, brethren, whatever is true, whatever is honorable, whatever is right, whatever is pure, whatever is lovely, whatever is of good repute, if there is any excellence and if anything worthy of praise, dwell on these things." (Philippians 4:8)

#177916 - arcaios26 - Wed Apr 24, 2013 2:33 pm

that GPIO is a nintendo included one for the mask rom to connect things like RTC and what not, the problem is that while in the official cart the mask rom contains that port for talking to those peripherals my flash chip doesn't so I have to recreate it as best I can tell.

the reason I was wondering about driving /CE high and low again for the flash chip is the datasheet shows it having its own address latch on the input lines but makes no mention of a sequential read/write counter

#177917 - WriteASM - Wed Apr 24, 2013 4:30 pm

What's the part number of the FLASH chip you're using?
When looking through various FLASH memory datasheets, I see references to address latching when /CE or /WE fall (whichever happens later), but that's only for the final address on a JEDEC programming sequence. For reads, the timing diagrams usually indicate, "Address stable", indicating it is not latched.

To the best of my knowledge, if the address needs latched for a read cycle, an "ALE" pin (Address Latch Enable) will be present; this is usually only found on very large memory chips. At any rate, obviously, the fewer steps to get data, the faster (and simpler) the whole project will be.

And yes, if only we could find a FLASH chip with a sequential read/write counter...:-)
_________________
"Finally, brethren, whatever is true, whatever is honorable, whatever is right, whatever is pure, whatever is lovely, whatever is of good repute, if there is any excellence and if anything worthy of praise, dwell on these things." (Philippians 4:8)

#177918 - arcaios26 - Thu Apr 25, 2013 1:39 am

I've been looking at the MX29GL256F currently from Macronix. Reading over the data sheet again it seems like the address latch it has is used for program and erase cycles or something. I'm still reading the data sheets and absorbing the info to see if it will be a viable chip since I actually have one at my house from an old project I never really got beyond concept design.

In reference to the GPIO stuff I think my best bet is to build logic to map the addresses that control it and pass the required signals between the RTC chip and the GBA bus since nintendo had the gpio port built into their custom mask rom they used.

#177919 - arcaios26 - Fri Apr 26, 2013 7:13 am

one thing I've never been extremely good at is determining if I need resistors and capacitors in various places like I see in other shcematics...Any tips?

#177920 - WriteASM - Fri Apr 26, 2013 1:10 pm

In general, digital logic doesn't need resistors, unless you're doing a voltage level conversion. A few small capacitors across the power supply at several points is a good idea, but probably not critical.

The MX29GL256F looks like it will work fine; what is slightly confusing in the datasheet is Figure 19 (page 63): a special "page read mode". As long as it will give data beyond the 8 words (or 16 bytes), toggling of /CE or /OE will not be required.
Most likely, the 25nS read time will only be valid in "the page", and if the "non-page address" changes, it'll probably take the full access time.

I'm not sure if you have the 90nS or 110nS version, but that determines how much time (from 120nS) that the CPLD has available to provide an address (30nS or 10nS). Unfortunately, the GBA cartridge waveform timing photos I have are pretty blurred; maybe I should try again.
_________________
"Finally, brethren, whatever is true, whatever is honorable, whatever is right, whatever is pure, whatever is lovely, whatever is of good repute, if there is any excellence and if anything worthy of praise, dwell on these things." (Philippians 4:8)

#177921 - arcaios26 - Fri Apr 26, 2013 2:07 pm

I have the 90ns version. If I understood the page read mode correctly it uses some way of addressing to change pages but it isn't the only read mode it has, it should be capable of doing a standard byte or word read as well.

I was thinking the resistors probably wouldn't be necessary except maybe where the CPLD I'm using suggests on the JTAG circuitry.

I was planning on a few capcitors on the power supply as a precaution but was thinking they probably wouldn't matter much. Either way I just wanted to know if I was missing something and needed any.

#177926 - Gamer2020 - Wed May 08, 2013 8:18 pm

http://nocash.emubase.de/gbatek.htm#gbacartrealtimeclockrtc