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ASM > Weird ARM Instruction

#85357 - StiNKy - Mon May 29, 2006 10:10 am

Hi all.

Not too sure if I'm posting in the correct forum, so please bare with me if I'm not.

I'm trying to decode this ARM instruction, but I'm having a little trouble identifying what it is, it's hexcode is: 0xE121F000.

The closest match I can find is MSR, but it definatly can't be it, observe:

Code:
Instruction:     1110 00010 0 1000011111 00000000 0000
MSR instruction: cond 00010 P 1010011111 00000000 Rm..
                            ^   ^                 ^
                            |   + incorrect bit   + source register
                            + Destination PSR (0=CPSR, 1=SPSR)


This instruction was found on a DS rom, hence why I wasn't sure if this was the correct forum...
Can anyone help shed light on this subject?
Thanks.

#85358 - keldon - Mon May 29, 2006 10:18 am

Are you sure that this is code and not data?

#85364 - StiNKy - Mon May 29, 2006 1:41 pm

100%, and just to confirm it: all the code around it is very logical, ie: mov operations into a register, then an ldr or an str after it using the same register.
edit: Oh and all the code around it all have the "AL" condition, which also helps demonstrate it's real ARM code.

#85367 - chishm - Mon May 29, 2006 2:43 pm

MSR to SPSR, write to flags and control field, using register Rm as source.
Source: GBATek

Oh, and this probably belongs in the ASM section.
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#85370 - keldon - Mon May 29, 2006 3:36 pm

StiNKy wrote:
100%, and just to confirm it: all the code around it is very logical, ie: mov operations into a register, then an ldr or an str after it using the same register.
edit: Oh and all the code around it all have the "AL" condition, which also helps demonstrate it's real ARM code.


That does not tell you that the next instruction will be code. Could be just empty space for self modifying code, but you've got your answer now anyway.

#130063 - Augustus - Wed May 30, 2007 5:34 pm

Haha, I had the exact same problem a week ago. I was overlooking something evidentially, but yeah, it's definitely MSR. Chances are high that it's changing the mode to set the IRQ and user stack. That's one of the first things in crt0.
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#135019 - kiwi.ds - Thu Jul 19, 2007 12:24 pm

this is the instruction:

MSR CPSR_c, r0
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