Bits for REG_DMAxCNT. More...

Macros
#define	DMA_DST_INC 0
	Incrementing destination address.

#define	DMA_DST_DEC 0x00200000
	Decrementing destination.

#define	DMA_DST_FIXED 0x00400000
	Fixed destination.

#define	DMA_DST_RELOAD 0x00600000
	Increment destination, reset after full run.

#define	DMA_SRC_INC 0
	Incrementing source address.

#define	DMA_SRC_DEC 0x00800000
	Decrementing source address.

#define	DMA_SRC_FIXED 0x01000000
	Fixed source address.

#define	DMA_REPEAT 0x02000000
	Repeat transfer at next start condition.

#define	DMA_16 0
	Transfer by halfword.

#define	DMA_32 0x04000000
	Transfer by word.

#define	DMA_AT_NOW 0
	Start transfer now.

#define	DMA_GAMEPAK 0x08000000
	Gamepak DRQ.

#define	DMA_AT_VBLANK 0x10000000
	Start transfer at VBlank.

#define	DMA_AT_HBLANK 0x20000000
	Start transfer at HBlank.

#define	DMA_AT_SPECIAL 0x30000000
	Start copy at 'special' condition. Channel dependent.

#define	DMA_AT_FIFO 0x30000000
	Start at FIFO empty (DMA0/DMA1)

#define	DMA_AT_REFRESH 0x30000000
	VRAM special; start at VCount=2 (DMA3)

#define	DMA_IRQ 0x40000000
	Enable DMA irq.

#define	DMA_ENABLE 0x80000000
	Enable DMA.

#define	DMA_COUNT_MASK 0x0000FFFF

#define	DMA_COUNT_SHIFT 0

#define	DMA_COUNT(n) ((n)<<DMA_COUNT_SHIFT)

#define	DMA_NOW (DMA_ENABLE \| DMA_AT_NOW)

#define	DMA_16NOW (DMA_NOW \| DMA_16)

#define	DMA_32NOW (DMA_NOW \| DMA_32)

#define	DMA_CPY16 (DMA_NOW \| DMA_16)

#define	DMA_CPY32 (DMA_NOW \| DMA_32)

#define	DMA_FILL16 (DMA_NOW \| DMA_SRC_FIXED \| DMA_16)

#define	DMA_FILL32 (DMA_NOW \| DMA_SRC_FIXED \| DMA_32)

#define	DMA_HDMA (DMA_ENABLE \| DMA_REPEAT \| DMA_AT_HBLANK \| DMA_DST_RELOAD)

Detailed Description

Bits for REG_DMAxCNT.

Macros

Detailed Description