libtonc
|
Modules | |
More BIOS functions | |
Reset functions | |
void | SoftReset (void) |
void | RegisterRamReset (u32 flags) |
Halt functions | |
void | Halt (void) |
Wait for the next VBlank (swi 05h). | |
void | Stop (void) |
Wait for the next VBlank (swi 05h). | |
void | IntrWait (u32 flagClear, u32 irq) |
Wait for the next VBlank (swi 05h). | |
void | VBlankIntrWait (void) |
Wait for the next VBlank (swi 05h). | |
Math functions | |
s32 | Div (s32 num, s32 den) |
Basic integer division (swi 06h). | |
s32 | DivArm (s32 den, s32 num) |
Basic integer division, but with switched arguments (swi 07h). | |
u32 | Sqrt (u32 num) |
Integer Square root (swi 08h). | |
s16 | ArcTan (s16 dydx) |
Arctangent of dydx (swi 08h) | |
s16 | ArcTan2 (s16 x, s16 y) |
Arctangent of a coordinate pair (swi 09h). | |
Memory copiers/fillers | |
void | CpuSet (const void *src, void *dst, u32 mode) |
Transfer via CPU in (half)word chunks. | |
void | CpuFastSet (const void *src, void *dst, u32 mode) |
A fast transfer via CPU in 32 byte chunks. | |
u32 | BiosCheckSum (void) |
Transfer via CPU in (half)word chunks. | |
Rot/scale functions | |
void | ObjAffineSet (const ObjAffineSource *src, void *dst, s32 num, s32 offset) |
Sets up a simple scale-then-rotate affine transformation (swi 0Eh). | |
void | BgAffineSet (const BgAffineSource *src, BgAffineDest *dst, s32 num) |
Sets up a simple scale-then-rotate affine transformation (swi 0Eh). | |
Decompression (see GBATek for format details) | |
void | BitUnPack (const void *src, void *dst, const BUP *bup) |
void | LZ77UnCompWram (const void *src, void *dst) |
void | LZ77UnCompVram (const void *src, void *dst) |
void | HuffUnComp (const void *src, void *dst) |
void | RLUnCompWram (const void *src, void *dst) |
void | RLUnCompVram (const void *src, void *dst) |
void | Diff8bitUnFilterWram (const void *src, void *dst) |
void | Diff8bitUnFilterVram (const void *src, void *dst) |
void | Diff16bitUnFilter (const void *src, void *dst) |
Multiboot handshake | |
int | MultiBoot (MultiBootParam *mb, u32 mode) |
s16 ArcTan | ( | s16 | dydx | ) |
Arctangent of dydx (swi 08h)
dydx | Slope to get the arctangent of. |
s16 ArcTan2 | ( | s16 | x, |
s16 | y | ||
) |
Arctangent of a coordinate pair (swi 09h).
This is the full-circle arctan, with an angle range of [0,FFFFh].
void BgAffineSet | ( | const BgAffineSource * | src, |
BgAffineDest * | dst, | ||
s32 | num | ||
) |
Sets up a simple scale-then-rotate affine transformation (swi 0Eh).
Uses a single ObjAffineSource struct to set up an array of affine matrices (either BG or Object) with a certain transformation. The matrix created is
sx·cos(α) | -sx·sin(α) |
sy·sin(α) | sy·cos(α) |
\param src Array with scale and angle information. \param dst Array of affine matrices, starting at a \a pa element. \param num Number of matrices to set. \param offset Offset between affine elements. Use 2 for BG and 8 for object matrices. \note Each element in \a src needs to be word aligned, which devkitPro doesn't do anymore by itself.
u32 BiosCheckSum | ( | void | ) |
Transfer via CPU in (half)word chunks.
The default mode is 16bit copies. With bit 24 set, it copies words; with bit 26 set it will keep the source address constant, effectively performing fills instead of copies.
src | Source address. |
dst | Destination address. |
mode | Number of transfers, and mode bits. |
void CpuFastSet | ( | const void * | src, |
void * | dst, | ||
u32 | mode | ||
) |
A fast transfer via CPU in 32 byte chunks.
This uses ARM's ldmia/stmia instructions to copy 8 words at a time, making it rival DMA transfers in speed. With bit 26 set it will keep the source address constant, effectively performing fills instead of copies.
src | Source address. |
dst | Destination address. |
mode | Number of words to transfer, and mode bits. |
void CpuSet | ( | const void * | src, |
void * | dst, | ||
u32 | mode | ||
) |
Transfer via CPU in (half)word chunks.
The default mode is 16bit copies. With bit 24 set, it copies words; with bit 26 set it will keep the source address constant, effectively performing fills instead of copies.
src | Source address. |
dst | Destination address. |
mode | Number of transfers, and mode bits. |
s32 Div | ( | s32 | num, |
s32 | den | ||
) |
Basic integer division (swi 06h).
num | Numerator. |
den | Denominator. |
DivSafe
instead Referenced by obj_rotscale_ex().
s32 DivArm | ( | s32 | den, |
s32 | num | ||
) |
Basic integer division, but with switched arguments (swi 07h).
num | Numerator. |
den | Denominator. |
void Halt | ( | void | ) |
Wait for the next VBlank (swi 05h).
void IntrWait | ( | u32 | flagClear, |
u32 | irq | ||
) |
Wait for the next VBlank (swi 05h).
void ObjAffineSet | ( | const ObjAffineSource * | src, |
void * | dst, | ||
s32 | num, | ||
s32 | offset | ||
) |
Sets up a simple scale-then-rotate affine transformation (swi 0Eh).
Uses a single ObjAffineSource struct to set up an array of affine matrices (either BG or Object) with a certain transformation. The matrix created is
sx·cos(α) | -sx·sin(α) |
sy·sin(α) | sy·cos(α) |
\param src Array with scale and angle information. \param dst Array of affine matrices, starting at a \a pa element. \param num Number of matrices to set. \param offset Offset between affine elements. Use 2 for BG and 8 for object matrices. \note Each element in \a src needs to be word aligned, which devkitPro doesn't do anymore by itself.
void Stop | ( | void | ) |
Wait for the next VBlank (swi 05h).
void VBlankIntrWait | ( | void | ) |
Wait for the next VBlank (swi 05h).
Referenced by key_wait_till_hit().